器件名称: MC100E143
功能描述: 5V ECL 9-Bit Hold Register
文件大小: 128.13KB 共8页
简 介:MC10E143, MC100E143 5V ECL 9-Bit Hold Register
Description
The MC10E/100E143 is a 9-bit holding register, designed with byte-parity applications in mind. The E143 holds current data or loads new data, with the nine inputs D0 D8 accepting parallel input data. The SEL (Select) input pin is used to switch between the two modes of operation HOLD and LOAD. Input data is accepted by the registers a set-up time before the positive going edge of CLK1 or CLK2. A HIGH on the Master Reset pin (MR) asynchronously resets all the registers to zero. The 100 Series contains temperature compensation.
Features
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700 MHz Min. Operating Frequency 9-Bit for Byte-Parity Applications Asynchronous Master Reset Dual Clocks PECL Mode Operating Range: VCC= 4.2 V to 5.7 V with VEE= 0 V NECL Mode Operating Range: VCC= 0 V with VEE = 4.2 V to 5.7 V Internal Input 50 kW Pulldown Resistors ESD Protection: Human Body Model; > 2 kV, Machine Model; > 200 V Meets or Exceeds JEDEC Standard EIA/JESD78 IC Latchup Test Moisture Sensitivity Level: Pb = 1 PbFree = 3 For Additional Information, see Application Note AND8003/D Flammability Rating: UL 94 V0 @ 0.125 in, Oxygen Index: 28 to 34 Transistor Count = 484 devices PbFree Packages are Available*
PLCC28 FN SUFFIX CASE 776
MARKING DIAGRAM*
1
MCxxxE143FNG AWLYYWW
xxx A WL YY WW G
= 10 or 100 = Assembly Location = Wafer Lot = Year = Work Week = PbFree Package
*For additional marking information, refer to Application Note AND80……
