器件名称: MC100E142FN
功能描述: 9-BIT SHIFT REGISTER
文件大小: 109.05KB 共4页
简 介:MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
9Bit Shift Register
The MC10E/100E142 is a 9-bit shift register, designed with byte-parity applications in mind. The E142 performs serial/parallel in and serial/parallel out, shifting in one direction. The nine inputs D0 – D8 accept parallel input data, while S-IN accepts serial input data. The Qn outputs do not need to be terminated for the shift operation to function. To minimize noise and power, any Q output not used should be left unterminated. 700MHz Min. Shift Frequency 9-Bit for Byte-Parity Applications Asynchronous Master Reset Dual Clocks Extended 100E VEE Range of – 4.2V to – 5.46V 75k Input Pulldown Resistors The SEL (Select) input pin is used to switch between the two modes of operation — SHIFT and LOAD. The shift direction is from bit 0 to bit 8. Input data is accepted by the registers a set-up time before the positive going edge of CLK1 or CLK2; shifting is also accomplished on the positive clock edge. A HIGH on the Master Reset pin (MR) asynchronously resets all the resisters to zero.
SEL 25 MR CLK1 CLK2 VEE S-IN D0 D1 26 27 28 1 2 3 4 5 D2 6 7 8 9 10 11 D3 D8 24 D7 23 D6 22 D5 21 VCCO 20 Q8 19 18 17 16 Q7 Q6 VCC Q5 VCCO Q4 Q3 D1 S-IN D0
MC10E142 MC100E142
9-BIT SHIFT REGISTER
FN SUFFIX PLASTIC PACKAGE CASE 776-02
LOGIC DIAGRAM
1 0 D Q Q0
Pinout: 28-Lead PLCC (Top View)
15 14 13 12
1 0
D
Q
Q1
D2
1 0 1 0
D
Q
Q2
D3 D4 VCCO Q0 Q1 Q2 * All VCC and VCCO pins are tied together on the die.
D
Q
Q3
PIN NA……
