器件名称: STE100
功能描述: PCI 10/100 ETHERNET CONTROLLER WITH INTEGRATED PHY 5V
文件大小: 403.22KB 共66页
简 介:STE10/100
PCI 10/100 ETHERNET CONTROLLER WITH INTEGRATED PHY (5V)
PRODUCT PREVIEW
1.0 DESCRIPTION The STE10/100 is a high performance PCI Fast Ethernet controller with integrated physical layer interface for 10BASE-T and 100BASE-TX application. It was designed with advanced CMOS technology to provide glueless 32-bit bus master interface for PCI bus, boot ROM interface, CSMA/CD protocol for Fast Ethernet, as well as the physical media interface for 100BASE-TX of IEEE802.3u and 10BASE-T of IEEE802.3. The auto-negotiation function is also supported for speed and duplex detection. The STE10/100 provides both half-duplex and fullduplex operation, as well as support for full-duplex flow control. It provides long FIFO buffers for transmission and receiving, and early interrupt mechanism to enhance performance. The STE10/100 also supports ACPI and PCI compliant power management function. 2.0 FEATURES
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PQFP128 (14x20x2.7mm) ORDERING NUMBER: STE10/100
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PCI bus interface Rev. 2.2 compliant ACPI and PCI power management standard compliant Support PC99 wake on LAN
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2.2 FIFO
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Provides independent transmission and receiving FIFOs, each 2k bytes long Pre-fetches up to two transmit packets to minimize inter frame gap (IFG) to 0.96us Retransmits collided packet without reload from host memory within 64 bytes. Automatically retransmits FIFO under-run packet with maximum drain threshold until 3rd time retry failure without influencing the registers and transmit threshold of next pac……