器件名称: STE100P
功能描述: 10/100 FAST ETHERNET 3.3V TRANSCEIVER
文件大小: 193.73KB 共29页
简 介:STE100P
10/100 FAST ETHERNET 3.3V TRANSCEIVER
PRODUCT PREVIEW
1.0 DESCRIPTION
The STE100P, also referred to as STEPHY1, is a high performance Fast Ethernet physical layer interface for 10BASE-T and 100BASE-TX applications. It was designed with advanced CMOS technology to provide a Media Independent Interface (MII) for easy attachment to 10/100 Media Access Controllers (MAC) and a physical media interface for 100BASETX of IEEE802.3u and 10BASE-T of IEEE802.3. The STEPHY1 supports both half-duplex and full-duplex operation, at 10 and 100 Mbps operation. Its operating mode can be set using auto-negotiation, parallel detection or manual control. It also allows for the support of auto-negotiation functions for speed and duplex detection.
PQFP64 ORDERING NUMBER: STE100P
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2.0 FEATURE 2.1 Industry standard
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Support for IEEE802.3x flow control IEEE802.3u Auto-Negotiation support for 10BASE-T and 100BASE-TX MII interface Standard CSMA/CD or full duplex operation supported
IEEE802.3u 100BASE-TX and IEEE802.3 10BASE-T compliant
Figure 1. BLOCK DIAGRAM
LEDS
LEDS
100Mb/s
TX_CLK TXD[3:0] TX_ER TX_EN Serial Management 4B/5B
TX Channel
Scrambler Parallel to Serial NRZ To NRZI Encoder
Binary To MLT3 Encoder TRANSMITTER 10/100 10 TX Filter
TXP TXN
10Mb/s
NRZ ToManchester Encoder
Link Pulse Generator
MDIO
Interface / Controller
MDC
REGISTERS
Auto Negotiation
Loopback
Clock Generation
System Clock
RXD[3:0] RX_ER RX_DV RX_CLK
MII
RX Channel 100Mb/s
4B/5B
Descramb……
