器件名称: MC14042BD
功能描述: QUAD TRANSPARENT LATCH
文件大小: 202.87KB 共6页
简 介:MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
MC14042B Quad Transparent Latch
The MC14042B Quad Transparent Latch is constructed with MOS P–channel and N–channel enhancement mode devices in a single monolithic structure. Each latch has a separate data input, but all four latches share a common clock. The clock polarity (high or low) used to strobe data through the latches can be reversed using the polarity input. Information present at the data input is transferred to outputs Q and Q during the clock level which is determined by the polarity input. When the polarity input is in the logic “0” state, data is transferred during the low clock level, and when the polarity input is in the logic “1” state the transfer occurs during the high clock level. Buffered Data Inputs Common Clock Clock Polarity Control Q and Q Outputs Double Diode Input Protection Supply Voltage Range = 3.0 Vdc to 1 8 Vdc Capable of Driving Two Low–power TTL Loads or One Low–power Schottky TTL Load Over the Rated Temperature Range
L SUFFIX CERAMIC CASE 620 P SUFFIX PLASTIC CASE 648
D SUFFIX SOIC CASE 751B
ORDERING INFORMATION
MC14XXXBCP MC14XXXBCL MC14XXXBD Plastic Ceramic SOIC
MAXIMUM RATINGS* (Voltages Referenced to VSS)
Symbol Parameter VDD Vin, Vout lin, lout PD Tstg DC Supply Voltage Value Unit V V – 0.5 to + 18.0 ± 10 500 Input or Output Voltage (DC or Transient) – 0.5 to VDD + 0.5 Input or Output Current (DC or Transient), per Pin Power Dissipation, per P……
