器件名称: CS200
功能描述: 65nm CMOS Technology
文件大小: 603.98KB 共2页
简 介:65nm CMOS Technology, CS200 / CS200A
Description
As miniaturization of silicon devices progresses, Fujitsu provides the most competitive, world-class technology to ASIC and COT customers. Fujitsu's 65nm technology has shrunk gates by 25% when compared to the 90nm technology. Fujitsu will start tape-out acceptance for the technology in early 2006.
Features
The 30nm long gate, only 75% the size of the CS100 transistors. 20 to 30% faster performance than the 90nm generation. Transistor density doubled compared with the 90nm generation. SRAM cell area reduced 50% compared with the 90nm generation.
Specifications
65nm (CS200)
Gate length Core VDD Gate oxide thickness (physical) Gate electrode Source / drain electrode Interconnects Metal 1 pitch Inter-level dielectric Drain current enhancement 30nm 1.0V 1.1nm NiSi / Poly-Si NiSi 11-Cu + 1-Al 0.18m Porous ULK (k = 2.25) Advanced stress control
65nm (CS200A)
50nm 1.2V 1.7nm CoSi2 / Poly-Si CoSi2 s s s s
65nm CMOS Technology, CS200 / CS200A
Technology Lineup
CS200A: Wide Speed Range + Low Power Consumption
Large Low Power Lineup CS200A
HS-Tr Server/ Network STD-Tr UHS-Tr HV-Tr Mobile Computing HS-Tr
Standard Vdd UHS HS STD LL HVt 1.8V 2.5V 3.3V 3.3V LVt 6T Symmetry
Technology families CS200A CS200 1.2V x x x x x x x x 0.535m2 1.0V x x x x x
Leakage current
High End Server
Core
STD-Tr Digital Consumer LL-Tr Cellular Phone
High Performance Lineup CS200
UHS:Ultra high speed, HS:High speed STD:Standard, LL:Low leakage
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