器件名称: CS2000-OTP_09
功能描述: Fractional-N Clock Synthesizer & Clock Multiplier
文件大小: 260.63KB 共30页
简 介:CS2000-OTP
Fractional-N Clock Synthesizer & Clock Multiplier
Features
Delta-Sigma Fractional-N Frequency Synthesis
General Description
The CS2000-OTP is an extremely versatile system clocking device that utilizes a programmable phase lock loop. The CS2000-OTP is based on a hybrid analogdigital PLL architecture comprised of a unique combination of a Delta-Sigma Fractional-N Frequency Synthesizer and a Digital PLL. This architecture allows for both frequency synthesis/clock generation from a stable reference clock as well as generation of a low-jitter clock relative to an external noisy synchronization clock with frequencies as low as 50 Hz. The CS2000OTP has many configuration options which are set once prior to runtime. At runtime there are three hardware configuration pins available for mode and feature selection. The CS2000-OTP is available in a 10-pin MSOP package in Commercial (-10°C to +70°C) grade. Customer development kits are also available for custom device prototyping, small production programming, and device evaluation. Please see “Ordering Information” on page 29 for complete details.
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Generates a Low Jitter 6 - 75 MHz Clock from an 8 - 75 MHz Reference Clock Generates a Low Jitter 6 - 75 MHz Clock from a Jittery 50 Hz to 30 MHz Clock Source Maximum Error Less Than 1 PPM in HighResolution Mode Configurable Hardware Control Pins Configurable Auxiliary Output External Oscillator or Clock Source Supports Inexpensive Local Crystal No External Analog Loop-filter C……