器件名称: IZ74LV164
功能描述: 8-BIT SERIAL-IN/PARALLEL-OUT SHIFT REGISTER
文件大小: 45.83KB 共6页
简 介:TECHNICAL DATA
IN74LV164
8-BIT SERIAL-IN/PARALLEL-OUT SHIFT REGISTER
The IN74LV164 is a low-voltage Si-gate CMOS device and is pin and function compatible with the IN74HC/HCT164. The IN74LV164 is an 8-bit edge-triggered shift register with serial data entry and an output from each of the eight stages. Data is entered serially through one of two inputs (DSA or DSB); either input can be used as an active HIGH enable for data entry through the other input. Both inputs must be connected together or an unused input must be tied HIGH. Data shifts one place to the right on each LOW-to-HIGH transition of the clock (CP) input and enters into Q0, which is the logical AND of the two data inputs (DSA, DSB ) that existed one set-up time prior to the rising clock edge. A LOW on the master reset (MR) input overrides all other inputs and clears the register asynchronously, forcing all outputs LOW. Outputs Directly Interface to CMOS, NMOS, and TTL Operating Voltage Range: 1.2 to 5.5 V Low Input Current: 1.0 A, 0.1 at = 25 ° Output Current: 6 mA at VCC = 3.0 V; 12 mA at VCC = 4.5 V High Noise Immunity Characteristic of CMOS Devices
N SUFFIX PLASTIC DIP 14 1 14 1 ORDERING INFORMATION D SUFFIX SO
IN74LV164N IN74LV164D IZ74LV164
Plastic DIP SOIC chip
TA = -40° to 125° C for all packages
PIN ASSIGNMENT
DSA 1 DSB 2 3 4 5 6 7 14 13 12 11 10 9 8 V CC Q7 Q6 Q5 Q4 MR CP
LOGIC DIAGRAM
Q0 Q1
1 SERIAL DSA DATA 2 INPUTS DSB
Q2
2 Q0 DATA 4 Q1
Q3 GND
PARALLEL DATA OUTPUTS
5 Q2 6 Q3 10 Q 4 ……
