EEPW首页 | 器件索引 | 厂商列表 | IC替换 | 微缩略语 | 电路图查询
器件查询:
400万器件资料库等您来搜!
   首页 > PLX > PEX8648-AARDK

PEX8648-AARDK

器件名称: PEX8648-AARDK
功能描述: PCIe Gen2, 5.0GT/s 48-lane, 12-port PCIe Switch
文件大小: 230.91KB    共4页
生产厂商: PLX
下  载:    在线浏览   点击下载
简  介:Version 0.8 2007 Features PEX 8648 General Features o 48-lane, 12-port PCIe Gen2 switch - Integrated 5.0 GT/s SerDes o 27 x 27mm2, 676-pin FCBGA package o Typical Power: < 7.0 Watts PEX 8648 PCIe Gen2, 5.0GT/s 48-lane, 12-port PCIe Switch The ExpressLaneTM PEX 8648 device offers PCI Express switching capability enabling users to add scalable high bandwidth, non-blocking interconnection to a wide variety of applications including servers, storage systems, and communications platforms. The PEX 8648 is well suited for fan-out, aggregation, and peer-to-peer applications. High Performance & Low Packet Latency The PEX 8648 architecture supports packet cut-thru with a maximum latency of 140ns (x16 to x16). This, combined with large packet memory and non-blocking internal switch architecture, provides full line rate on all ports for performance-hungry applications such as servers and switch fabrics. The low latency enables applications to achieve high throughput and performance. In addition to low latency, the device supports a packet payload size of up to 2048 bytes, enabling the user to achieve even higher throughput. Data Integrity The PEX 8648 provides end-to-end CRC (ECRC) protection and Poison bit support to enable designs that require end-to-end data integrity. PLX also supports data path parity and memory (RAM) error correction as packets pass through the switch. Flexible Register & Port Configuration The PEX 8648’s 12 ports can be configured to lane widths of x1, x2, x4,……
相关电子器件
器件名 功能描述 生产厂商
PEX8648-AARDK PCIe Gen2, 5.0GT/s 48-lane, 12-port PCIe Switch PLX
《电子产品世界》杂志社 版权所有 北京东晓国际技术信息咨询有限公司
Copyright ©2002 ELECTRONIC ENGINEERING & PRODUCT WORLD. All rights reserved.
京ICP备12027778号-2