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74HCT3G04

器件名称: 74HCT3G04
功能描述: Inverter
文件大小: 82.99KB    共17页
生产厂商: PHILIPS
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简  介:INTEGRATED CIRCUITS DATA SHEET 74HC3G04; 74HCT3G04 Inverter Product specication Supersedes data of 2002 Jul 26 2003 Oct 30 Philips Semiconductors Product specication Inverter FEATURES Wide supply voltage range from 2.0 to 6.0 V Symmetrical output impedance High noise immunity Low power dissipation Balanced propagation delays Very small 8 pins package Output capability: standard ESD protection: HBM EIA/JESD22-A114-A exceeds 2000 V MM EIA/JESD22-A115-A exceeds 200 V. QUICK REFERENCE DATA GND = 0 V; Tamb = 25 °C; tr = tf ≤ 6.0 ns. DESCRIPTION 74HC3G04; 74HCT3G04 The 74HC3G/HCT3G04 is a high-speed Si-gate CMOS device and is pin compatible with low power Schottky TTL (LSTTL). Specified in compliance with JEDEC standard no. 7. The 74HC3G/HCT3G04 provides three inverting buffers. TYPICAL SYMBOL tPHL/tPLH CI CPD Notes 1. CPD is used to determine the dynamic power dissipation (PD in W). PD = CPD × VCC2 × fi × N + ∑ (CL × VCC2 × fo) where: fi = input frequency in MHz; fo = output frequency in MHz; CL = output load capacitance in pF; VCC = supply voltage in Volts; N = total switching outputs; ∑ (CL × VCC2 × fo) = sum of outputs. 2. For HC3G04 the condition is VI = GND to VCC. For HCT3G04 the condition is VI = GND to VCC 1.5 V. FUNCTION TABLE See note 1. INPUT nA L H Note 1. H = HIGH voltage level; L = LOW voltage level. OUTPUT nY H L PARAMETER propagation delay nA to nY input capacitance power dissipation capacitance per buffer notes 1 and 2 CONDITIONS HC3G04 CL = 50 p……
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