器件名称: 74AHC1G79
功能描述: Single D-type flip-flop; positive-edge trigger
文件大小: 83.59KB 共12页
简 介:INTEGRATED CIRCUITS
DATA SHEET
74AHC1G79; 74AHCT1G79 Single D-type flip-flop; positive-edge trigger
Product specication File under Integrated Circuits, IC06 1999 May 18
Philips Semiconductors
Product specication
Single D-type ip-op; positive-edge trigger
FEATURES Symmetrical output impedance High noise immunity ESD protection: HBM EIA/JESD22-A114-A exceeds 2000 V; MM EIA/JESD22-A115-A exceeds 200 V Low power dissipation Balanced propagation delays Very small 5 pin package Output capability: standard. DESCRIPTION The 74AHC1G/AHCT1G79 is a high-speed Si-gate CMOS device. The 74AHC1G/AHCT1G79 provides a single positive-edge triggered D-type flip-flop. Information on the data input is transferred to the Q output on the LOW-to-HIGH transition of the clock pulse. The D input must be stable one set-up time prior to the LOW-to-HIGH clock transition for predictable operation. FUNCTION TABLE See note 1. INPUTS CP ↑ ↑ L Note 1. H = HIGH voltage level; L = LOW voltage level; ↑ = LOW-to-HIGH CP transition; X = don’t care; Q + 1 = state after the next LOW-to-HIGH CP transition. D L H X OUTPUT Q+1 L H Q Notes QUICK REFERENCE DATA GND = 0 V; Tamb = 25 °C; tr = tf ≤ 3.0 ns.
74AHC1G79; 74AHCT1G79
TYPICAL SYMBOL tPHL/tPLH CI CPD PARAMETER propagation delay CP to Q input capacitance power dissipation capacitance CONDITIONS AHC1G CL = 15 pF; VCC = 5 V 3.5 1.5 notes 1 and 2; 15 CL = 50 pF; f = 1 Mhz AHCT1G 3.5 1.5 16 ns pF pF UNIT
1. CPD is used to determine the dynamic power dissi……
