器件名称: 74AHC164
功能描述: 8-bit serial-in/parallel-out shift register
文件大小: 92.35KB 共20页
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DATA SHEET
74AHC164; 74AHCT164 8-bit serial-in/parallel-out shift register
Product specication File under Integrated Circuits, IC06 2000 Aug 15
Philips Semiconductors
Product specication
8-bit serial-in/parallel-out shift register
FEATURES ESD protection: HBM EIA/JESD22-A114-A exceeds 2000 V MM EIA/JESD22-A115-A exceeds 200 V CDM EIA/JESD22-C101 exceeds 1000 V Balanced propagation delays All inputs have Schmitt-trigger actions Inputs accept voltages higher than VCC For AHC only: operates with CMOS input levels For AHCT only: operates with TTL input levels Specified from 40 to +85 °C and from 40 to +125 °C. DESCRIPTION
74AHC164; 74AHCT164
The 74AHC/AHCT164 shift registers are high-speed silicon-gate CMOS devices and are pin compatible with Low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard No. 7A. The 74AHC/AHCT164 input signals are 8-bit serial through one of two inputs (Dsa or Dsb); either input can be used as an active HIGH enable for data entry through the other input. Both inputs must be connected together or an unused input must be tied HIGH. Data shifts one place to the right on each LOW-to-HIGH transition of the clock (CP) input and enters into Q0, which is a logical AND of the two data inputs (Dsa, Dsb) that existed one set-up time prior to the rising clock edge. A LOW level on the master reset (MR) input overrides all other inputs and clears the register asynchronously, forcing all outputs LOW.
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