器件名称: 61LV256
功能描述: 32K x 8 LOW VOLTAGE CMOS STATIC RAM
文件大小: 100KB 共8页
简 介:IS61LV256
IS61LV256
32K x 8 LOW VOLTAGE CMOS STATIC RAM
ISSI
ISSI
FEBRUARY 1996
FEATURES
High-speed access time: 12, 15, 20, 25 ns Automatic power-down when chip is deselected CMOS low power operation — 345 mW (max.) operating — 7 mW (max.) CMOS standby TTL compatible interface levels Single 3.3V power supply Fully static operation: no clock or refresh required Three-state outputs
DESCRIPTION The ISSI IS61LV256 is a very high-speed, low power, 32,768-word by 8-bit static RAM. It is fabricated using ISSI's
high-performance CMOS technology. This highly reliable process coupled with innovative circuit design techniques, yields access times as fast as 12 ns maximum. When CE is HIGH (deselected), the device assumes a standby mode at which the power dissipation is reduced to 50 W (typical) with CMOS input levels. Easy memory expansion is provided by using an active LOW Chip Enable (CE). The active LOW Write Enable (WE) controls both writing and reading of the memory. The IS61LV256 is available in the JEDEC standard 28-pin, 300-mil DIP and SOJ, plus the 450-mil TSOP package.
FUNCTIONAL BLOCK DIAGRAM
A0-A14
DECODER
256 X 1024 MEMORY ARRAY
VCC GND I/O DATA CIRCUIT
I/O0-I/O7
COLUMN I/O
CE OE WE CONTROL CIRCUIT
ISSI reserves the right to make changes to its products at any time without notice in order to improve design and supply the best possible product. We assume no responsibility for any errors which may appear in this publication. Copyright 1996, Integrate……
