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MC100E101FN

器件名称: MC100E101FN
功能描述: 5V ECL Quad 4
文件大小: 69.51KB    共8页
生产厂商: ONSEMI
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简  介:MC10E101, MC100E101 5V ECL Quad 4-Input OR/NOR Gate The MC10E/100E101 is a quad 4-input OR/NOR gate. The 100 Series contains temperature compensation. 500 ps Max. Propagation Delay PECL Mode Operating Range: VCC = 4.2 V to 5.7 V NECL Mode Operating Range: VCC = 0 V ESD Protection: Human Body Model; > 2 KV, Machine Model; > 200 V Meets or Exceeds JEDEC Spec EIA/JESD78 IC Latchup Test Moisture Sensitivity Level 1 For Additional Information, see Application Note AND8003/D Flammability Rating: UL 94 V0 @ 0.125 in, Oxygen Index: 28 to 34 Transistor Count = 115 devices with VEE = 4.2 V to 5.7 V Internal Input 50 KW Pulldown Resistors with VEE = 0 V http://onsemi.com MARKING DIAGRAMS 1 28 MC10E101FN AWLYYWW PLCC28 FN SUFFIX CASE 776 1 28 A WL YY WW = Assembly Location = Wafer Lot = Year = Work Week MC100E101FN AWLYYWW ORDERING INFORMATION Device MC10E101FN MC10E101FNR2 MC100E101FN MC100E101FNR2 Package PLCC28 PLCC28 PLCC28 PLCC28 Shipping 37 Units/Rail 500 Units/Reel 37 Units/Rail 500 Units/Reel For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. Semiconductor Components Industries, LLC, 2003 1 November, 2003 Rev. 5 Publication Order Number: MC10E101/D MC10E101, MC100E101 LOGIC DIAGRAM AND PINOUT ASSIGNMENT D3a 25 D2d D2c D2b VEE D2a D1d D1c 26 27 28 1 LOGIC DIAGRAM D0a D0b D3b 24 D3c 23 D3d VCCO 22 21 Q3 20 Q3 19 18 17 16 Q2 Q2 VCC ……
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