器件名称: 54ACT11030J
功能描述: 8-INPUT POSITIVE-NAND GATES
文件大小: 63.4KB 共5页
简 介:54ACT11030, 74ACT11030 8-INPUT POSITIVE-NAND GATES
SCLS050 – MARCH 1987 – REVISED APRIL 1993
Inputs Are TTL-Voltage Compatible Flow-Through Architecture Optimizes PCB Layout Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise EPIC (Enhanced-Performance Implanted CMOS) 1-m Process 500-mA Typical Latch-Up Immunity at 125°C Package Options Include Plastic Small-Outline Packages, Ceramic Chip Carriers, and Standard Plastic and Ceramic 300-mil DIPs
54ACT11030 . . . J PACKAGE 74ACT11030 . . . D OR N PACKAGE (TOP VIEW)
C B A GND Y NC NC
1 2 3 4 5 6 7
14 13 12 11 10 9 8
D E F VCC NC G H
54ACT11030 . . . FK PACKAGE (TOP VIEW)
description
These devices contain a single 8-input NAND gate and perform the following Boolean functions in positive logic: Y = A B C D E F G H or Y=A+B+C+D+E+F+G+H The 54ACT11030 is characterized for operation over the full military temperature range of – 55°C to 125°C. The 74ACT11030 is characterized for operation from – 40°C to 85°C.
FUNCTION TABLE INPUTS A THRU H All inputs H One or more inputs L OUTPUT Y L H
D NC C NC B
4 5 6 7 8
3 2 1 20 19 18 17 16 15 14 9 10 11 12 13
E F NC V CC NC G NC H NC NC
NC – No internal connection
logic symbol
A B C D E F G H 3 2 1 14 13 12 9 8 5 Y &
logic diagram (positive logic)
A B C D E F G H 3 2 1 14 13 12 9 8 5 Y
This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12. Pin numbers shown are for the D, J, and N packages.
EPIC is a trademark of Te……
