器件名称: 74LV161N
功能描述: Presettable synchronous 4-bit binary counter; asynchronous reset
文件大小: 148.16KB 共16页
简 介:INTEGRATED CIRCUITS
74LV161 Presettable synchronous 4-bit binary counter; asynchronous reset
Product specification Supersedes data of 1997 Feb 12 IC24 Data Handbook 1997 May 15
Philips Semiconductors
Philips Semiconductors
Product specification
Presettable synchronous 4-bit binary counter; asynchronous reset
74LV161
FEATURES
Optimized for low voltage applications: 1.0 to 3.6 V Accepts TTL input levels between VCC = 2.7 V and VCC = 3.6 V Typical VOLP (output ground bounce) < 0.8 V at VCC = 3.3 V, Typical VOHV (output VOH undershoot) > 2 V at VCC = 3.3 V, Asynchronous reset Synchronous counting and loading Two count enable inputs for n-bit cascading Positive-edge triggered clock Output capability: standard ICC category: MSI
Tamb = 25°C Tamb = 25°C
DESCRIPTION
The 74LV161 is a low-voltage Si-gate CMOS device and is pin and function compatible with 74HC/HCT161. The 74LV161 is a synchronous presettable binary counter which features an internal look-head carry and can be used for high-speed counting. Synchronous operation is provided by having all flip-flops clocked simultaneously on the positive-going edge of the clock (CP). The outputs (Q0 to Q3) of the counters may be preset to a HIGH or LOW level. A LOW level at the parallel enable input (PE) disables the counting action and causes the data at the data inputs (D0 to D3) to be loaded into the counter on the positive-going edge of the clock (providing that the set-up and hold time requirements for PE are met).……
