器件名称: PEX8612-AA50BCG
功能描述: PCIe Gen2, 5.0GT/s 12-lane, 3-port Switch
文件大小: 183.3KB 共4页
简 介:Version 0.8 2007
Features
PEX 8612 General Features
o 12-lane, 3-port PCIe Gen2 switch - Integrated 5.0 GT/s SerDes o 19 x 19mm2, 324-pin FCBGA package o Typical Power: < 2.5 Watts
PEX 8612
PCIe Gen2, 5.0GT/s 12-lane, 3-port Switch
The ExpressLaneTM PEX 8612 device offers PCI Express switching capability enabling users to add scalable high bandwidth, non-blocking interconnection to a wide variety of applications including workstations, storage systems, communications platforms, embedded systems, and intelligent I/O modules. The PEX 8612 is well suited for fan-out, aggregation, and peer-to-peer applications.
High Performance & Low Packet Latency The PEX 8612 architecture supports packet cut-thru with a maximum latency of 150ns (x4 to x4). This, combined with large packet memory and non-blocking internal switch architecture, provides full line rate on all ports for performance-hungry applications such as servers and switch fabrics. The low latency enables applications to achieve high throughput and performance. In addition to low latency, the device supports a max payload size of 2048 bytes, enabling the user to achieve even higher throughput. Data Integrity The PEX 8612 provides end-to-end CRC (ECRC) protection and Poison bit support to enable designs that require end-to-end data integrity. PLX also supports data path parity and memory (RAM) error correction as packets pass through the switch. Flexible Register & Port Configuration The PEX 8612’s 3 ports can be configured ……