器件名称: M74HCT652M1R
功能描述: HCT651 OCTAL BUS TRANSCEIVER/REGISTER 3-STATE, INV. HCT652 OCTAL BUS TRANSCEIVER/REGISTER 3-STATE
文件大小: 199.43KB 共12页
简 介:M74HCT651 M74HCT652
HCT651 OCTAL BUS TRANSCEIVER/REGISTER (3-STATE, INV.) HCT652 OCTAL BUS TRANSCEIVER/REGISTER (3-STATE)
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HIGH SPEED fMAX = 60 MHz (TYP.) AT VCC = 5V COMPATIBLE WITH TTL OUTPUTS VIH = 2 V (MIN.) AT VIL = 0.8V (MAX) LOW POWER DISSIPATION o ICC = 4 A (MAX) AT TA = 25 C OUTPUT DRIVE CAPABILITY 15 LSTTL LOADS SYMMETRICAL OUTPUT IMPEDANCE IOH = IOL = 6 mA (mIN.) BALANCED PROPAGATION DELAYS tPLH = tPHL PIN AND FUNCTION COMPATIBLE WITH 54/74LS651/652
B1R (Plastic Package)
M1R (Micro Package)
ORDER CODES : M74HCXXXM1R M74HCXXXB1R
DESCRIPTION M74HCT651/652 are high speed CMOS OCTAL BUS TRANSCEIVERS AND REGISTERS (3-STATE), fabricated in silicon gate C2MOS technology. They have the same high speed performance of LSTTL combined with true CMOS low power consumption. These devices consist of bus transceiver circuits, D-type flip-flops, and control circuitry arranged for multiplexed transmission of data directly from the input bus or from the internal storage registers. Enable GAB and GBA are provided to control the transceiver functions. Select AB and Select BA control pins are provided to select whether real-time or stored data is transfered. A low input level selects real-time data, and a high selects stored data. Data on the A or B bus, or both, can be stored in the internal D flip-flops by low-to-high transitions at the appropriate clock pins (CLOCK AB or CLOCK BA) regardless of the select or enable control pins. When select AB and select BA are in ……
