器件名称: IZ74LV574
功能描述: Octal D-type flip-flop; positive edge-trigger (3-State)
文件大小: 194.86KB 共8页
简 介:TECHNICAL DATA
IN74LV574 Octal D-type flip-flop; positive edge-trigger (3-State)
The 74LV574 is a low-voltage Si-gate CMOS device and is pin and function compatible with 74HC/HCT574. The 74LV574 is an octal D-type flip–flop featuring separate D-type inputs for each flip-flop and non-inverting 3-state outputs for oriented applications. A clock (CP) and an output enable (OE) input are common to all flip-flops. The eight flip-flops will store the state of their individual D-inputs that meet the set-up and hold times requirements on the LOWto-HIGH CP transition. When OE is LOW, the contents of the eight flipflops are available at the outputs. When OE is HIGH, the outputs go to the high impedance OFF-state. Operation of the OE input does not affect the state of the flip-flops. Output voltage levels are compatible with input levels of CMOS, NMOS and TTL ICS Supply voltage range: 1.0 to 5.5 V Low input current: 1.0 ; 0.1 at = 25 ° High Noise Immunity Characteristic of CMOS Devices
N SUFFIX PLASTIC DIP
20 1 20 1 DW SUFFIX SO
ORDERING INFORMATION IN74LV574N IN74LV574DW IZ74LV574 Plastic DIP SOIC chip
TA = -40° to 125° C for all packages
PIN ASSIGNMENT
LOGIC DIAGRAM
FUNCTION TABLE
Inputs Output Enable PIN 20=VCC PIN 10 = GND L L L H L,H, X Clock D H L X X Output Q H L no change Z
H= high level L = low level X = don’t care Z = high impedance
INTEGRAL
1
IN74LV574
MAXIMUM RATINGS *
Symbol VCC IIK *
1 2
Parameter DC supply voltage Input diode current Output diode curren……
