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P602-89DSC

器件名称: P602-89DSC
功能描述: 12-27 MHz XO IC with 2 Pairs of LVDS Outputs
文件大小: 219.22KB    共5页
生产厂商: PLL
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简  介:PLL602-89D 12-27 MHz XO IC with 2 Pairs of LVDS Outputs FEATURES Low jitter XO for the 12MHz to 27MHz range. Integrated crystal load capacitor: no external load capacitor required. 2 pairs of LVDS outputs. 12-27 MHz fundamental crystal input. Low jitter (RMS): 2.5 ps period jitter (1 sigma). 2.5V to 3.3V operation. Available in 8-Pin SOIC package. PIN CONFIGURATION (Top View) VDD XIN XOUT GND 1 PLL602-89D 2 3 4 8 7 6 5 LVDS1_CLK LVDS1BAR_CLK LVDS2_CLK LVDS2BAR_CLK (8 pin SOIC) DESCRIPTION The PLL602-89D is a high performance multiple output XO IC chip. It provides 2 pairs of LVDS outputs. The chip combines a crystal oscillator (XO) with a multiple-output buffer. It accepts a low cost fundamental parallel resonant mode crystal from 12MHz to 27MHz, which is reproduced at the outputs. The very low jitter (2.5 ps RMS period jitter) makes this chip ideal for data and telecommunication applications. BLOCK DIAGRAM LVDS1_CLK XIN XOUT LVDS1BAR_CLK Oscillator Amplifier LVDS2_CLK LVDS2BAR_CLK 47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991 www.phaselink.com Rev 09/03/04 Page 1 PLL602-89D 12-27 MHz XO IC with 2 Pairs of LVDS Outputs PIN DESCRIPTION Name VDD XIN XOUT GND LVDSBAR_CLK LVDS_CLK Pin Number 1 2 3 4 5,7 6,8 Type P I I P O O Description Power supply. Crystal input. This is the input of the crystal oscillator circuitry. The crystal should be mounted as close to the IC as possible, with minimum parasitic capacitance. Cr……
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P602-89DSC 12-27 MHz XO IC with 2 Pairs of LVDS Outputs PLL
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