器件名称: 74ALVCHT16835DGV
功能描述: 18-bit registered driver (3-State)
文件大小: 93.47KB 共12页
简 介:INTEGRATED CIRCUITS
74ALVCHT16835 18-bit registered driver (3-State)
Product data 2002 Jun 05
Philips Semiconductors
Philips Semiconductors
Product data
18-bit registered driver (3-State)
74ALVCHT16835
FEATURES
Wide supply voltage range of 2.3 V to 3.6 V Complies with JEDEC standard no. 8-1A. CMOS low power consumption Direct interface with TTL levels Current drive ± 24 mA at 3.0 V MULTIBYTETM flow-through standard pin-out architecture Low inductance multiple VCC and GND pins for minimum noise
and ground bounce
PIN CONFIGURATION
NC NC Y1 GND Y2 Y3 VCC Y4 Y5 Y6 GND Y7 Y8 Y9 Y10 Y11 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 GND NC A1 GND A2 A3 VCC A4 A5 A6 GND A7 A8 A9 A10 A11 A12 GND A13 A14 A15 VCC A16 A17 GND A18 CP GND
Output drive capability 50 transmission lines @ 85 °C ESD protection exceeds 1500 V HBM per JESD22-A114, A115
and 1000 V CDM per JESD22-C101
Bus hold on data inputs eliminates the need for external
pullup/pulldown resistors
DESCRIPTION
The 74ALVCHT16835 is a 18-bit registered driver. Data flow is controlled by active low output enable (OE), active high latch enable (LE) and clock inputs (CP). When LE is HIGH, the A to Y data flow is transparent. When LE is LOW and CP is held at LOW or HIGH, the data is latched; on the LOW to HIGH transient of CP the A-data is stored in the latch/flip-flop. When OE is LOW the outputs are ……
