器件名称: 74ALVCH162827
功能描述: 20-bit buffer/line driver, non-inverting,with 30ohm termination resistors (3-State)
文件大小: 72.29KB 共10页
简 介:INTEGRATED CIRCUITS
74ALVCH162827 20-bit buffer/line driver, non-inverting, with 30W termination resistors (3-State)
Product specification IC24 Data Handbook 1998 Sep 29
Philips Semiconductors
Philips Semiconductors
Product specification
20-bit buffer/line driver, non-inverting, with 30 termination resistors (3-State)
74ALVCH162827
FEATURES
Complies with JEDEC standard no. 8-1A. CMOS low power consumption Direct interface with TTL levels Current drive ± 12 mA at 3.0 V MULTIBYTETM flow-through standard pin-out architecture Low inductance multiple VCC and GND pins for minimum noise
and ground bounce
DESCRIPTION
The 74ALVCH162827 high-performance CMOS device combines low static and dynamic power dissipation with high speed and high output drive. The 74ALVCH162827 20-bit buffers provide high performance bus interface buffering for wide data/address paths or buses carrying parity. They have NAND Output Enables (nOE1, nOE2) for maximum control flexibility. The 74ALVCH162827 is designed with 30 series resistance in both the pull-up and pull-down output structures. This design reduces line noise in applications such as memory address drivers, clock drivers and bus receivers/transmitters. To ensure the high impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking/current-sourcing capability of the driver. Active bus-hold circuitry is provided to hold unused ……
