器件名称: 74AHC2G125DC
功能描述: Bus buffer/line driver 3-state
文件大小: 117.98KB 共18页
简 介:INTEGRATED CIRCUITS
DATA SHEET
74AHC2G125; 74AHCT2G125 Bus buffer/line driver; 3-state
Product specication 2004 Jan 13
Philips Semiconductors
Product specication
Bus buffer/line driver; 3-state
FEATURES Symmetrical output impedance High noise immunity ESD protection: – HBM EIA/JESD22-A114-A exceeds 2000 V – MM EIA/JESD22-A115-A exceeds 200 V – CDM EIA/JESD22-C101 exceeds 1000 V. Low power dissipation Balanced propagation delays SOT505-2 and SOT765-1 package Specified from40 to +85 °C and 40 to +125 °C. QUICK REFERENCE DATA GND = 0 V; Tamb = 25 °C; tr = tf ≤ 3.0 ns.
74AHC2G125; 74AHCT2G125
DESCRIPTION The 74AHC2G/AHCT2G125 is a high-speed Si-gate CMOS device. The 74AHC2G/AHCT2G125 provides a dual non-inverting buffer/line driver with 3-state output. The 3-state output is controlled by the output enable input (nOE). A HIGH at pin nOE causes the output to assume a high-impedance OFF-state.
TYPICAL SYMBOL tPHL/tPLH CI CPD Notes 1. CPD is used to determine the dynamic power dissipation (PD in W). PD = CPD × VCC2 × fi × N + ∑(CL × VCC2 × fo) where: fi = input frequency in MHz; fo = output frequency in MHz; CL = output load capacitance in pF; VCC = supply voltage in Volts; N = total load switching outputs; ∑(CL × VCC2 × fo) = sum of outputs. 2. The condition is VI = GND to VCC. PARAMETER propagation delay nA to nY input capacitance CONDITIONS AHC2G CL = 15 pF; VCC = 5 V 3.4 1.5 AHCT2G 3.4 1.5 11 ns pF pF UNIT
power dissipation capacitance CL = 50 pF; f = 1 MHz; notes……
