器件名称: 74AHC1G125GV
功能描述: Bus buffer/line driver; 3-state
文件大小: 80.7KB 共16页
简 介:INTEGRATED CIRCUITS
DATA SHEET
74AHC1G125; 74AHCT1G125 Bus buffer/line driver; 3-state
Product specication Supersedes data of 2002 Mar 22 2002 Jun 06
Philips Semiconductors
Product specication
Bus buffer/line driver; 3-state
FEATURES Symmetrical output impedance High noise immunity ESD protection: – HBM EIA/JESD22-A114-A exceeds 2000 V – MM EIA/JESD22-A115-A exceeds 200 V – CDM EIA/JESD22-C101 exceeds 1000 V. Low power dissipation Balanced propagation delays Very small 5-pin package Output capability: standard Specified from 40 to +125 °C. QUICK REFERENCE DATA GND = 0 V; Tamb = 25 °C; tr = tf ≤ 3.0 ns.
74AHC1G125; 74AHCT1G125
DESCRIPTION The 74AHC1G/AHCT1G125 is a high-speed Si-gate CMOS device. The 74AHC1G/AHCT1G125 provides one non-inverting buffer/line driver with 3-state output. The 3-state output is controlled by the output enable input (OE). A HIGH at OE causes the output to assume a high-impedance OFF-state.
TYPICAL SYMBOL tPHL/tPLH CI CPD Notes 1. CPD is used to determine the dynamic power dissipation (PD in W). PD = CPD × VCC2 × fi + (CL × VCC2 × fo ) where: fi = input frequency in MHz; fo = output frequency in MHz; CL = output load capacitance in pF; VCC = supply voltage in Volts. 2. The condition is VI = GND to VCC. FUNCTION TABLE See note 1. INPUTS OE L L H Note 1. H = HIGH voltage level; L = LOW voltage level; X = don’t care; Z = high-impedance OFF-state. 2002 Jun 06 2 A L H X OUTPUT Y L H Z PARAMETER propagation delay A to Y input capacitance CON……
