器件名称: AS7C251MNTD18A-133TQIN
功能描述: 2.5V 1M x 18 Pipelined SRAM with NTD
文件大小: 435.91KB 共18页
简 介:December 2004
AS7C251MNTD18A
2.5V 1M x 18 Pipelined SRAM with NTDTM Features
Organization: 1,048,576 words × 18 bits NTDarchitecture for efficient bus operation Fast clock speeds to 166 MHz Fast clock to data access: 3.5/3.8 ns Fast OE access time: 3.5/3.8 ns Fully synchronous operation Asynchronous output enable control Available in 100-pin TQFP package Individual byte write and global write Clock enable for operation hold Multiple chip enables for easy expansion 2.5V core power supply Self-timed write cycles Interleaved or linear burst modes Snooze mode for standby operation
Logic block diagram
A[19:0] 20 D
Address register burst logic
Q
20
CLK CE0 CE1 CE2 R/W BWa BWb ADV / LD LBO ZZ
D
Q 20
Write delay addr. registers
CLK
Control logic
CLK
Write Buffer
CLK
1M x 18 SRAM array
DQ [a,b]
18
D
Data Q input register
CLK
18 18 18
18 CLK CEN CLK OE
Output register
18 OE
DQ [a,b]
Selection guide
-166 Minimum cycle time Maximum clock frequency Maximum clock access time Maximum operating current Maximum standby current Maximum CMOS standby current (DC)
12/23/04, v.2.2
-133 7.5 133 3.8 270 75 40
Units ns MHz ns mA mA mA
P. 1 of 18
6 166 3.5 290 85 40
Alliance Semiconductor
Copyright Alliance Semiconductor. All rights reserved.
AS7C251MNTD18A
16 Mb 2.5V Synchronous SRAM products list1,2
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