器件名称: 74LV132D
功能描述: Quad 2-input NAND Schmitt trigger
文件大小: 105.91KB 共17页
简 介:74LV132
Quad 2-input NAND Schmitt trigger
Rev. 04 — 12 November 2007 Product data sheet
1. General description
The 74LV132 is a low-voltage Si-gate CMOS device that is pin and function compatible with 74HC132 and 74HCT132. The 74LV132 contains four 2-input NAND gates which accept standard input signals. They are capable of transforming slowly changing input signals into sharply dened, jitter-free output signals. The gate switches at different points for positive and negative-going signals. The difference between the positive voltage VT+ and the negative voltage VT is dened as the input hysteresis voltage VH.
2. Features
s s s s s Wide operating voltage: 1.0 V to 5.5 V Optimized for low voltage applications: 1.0 V to 3.6 V Accepts TTL input levels between VCC = 2.7 V and VCC = 3.6 V Typical output ground bounce < 0.8 V at VCC = 3.3 V and Tamb = 25 °C Typical HIGH-level output voltage (VOH) undershoot: > 2 V at VCC = 3.3 V and Tamb = 25 °C s ESD protection: x HBM JESD22-A114E exceeds 2000 V x MM JESD22-A115-A exceeds 200 V s Multiple package options s Specied from 40 °C to +85 °C and from 40 °C to +125 °C
3. Applications
s Wave and pulse shapers for highly noisy environments s Astable multivibrators s Monostable multivibrators
NXP Semiconductors
74LV132
Quad 2-input NAND Schmitt trigger
4. Ordering information
Table 1. Ordering information Package Temperature range 74LV132N 74LV132D 74LV132DB 74LV132PW 74LV132BQ 40 °C to +125 °C 40 °C to +125 °C 40 °C to +125 °C 40 °C to……
