器件名称: 74AHC2G08DC
功能描述: Dual 2-input AND gate
文件大小: 90.17KB 共17页
简 介:74AHC2G08; 74AHCT2G08
Dual 2-input AND gate
Rev. 02 — 18 October 2004 Product data sheet
1. General description
The 74AHC2G08; 74AHCT2G08 is a high-speed Si-gate CMOS device. The 74AHC2G08; 74AHCT2G08 provides two 2-input AND gates.
2. Features
s Symmetrical output impedance s High noise immunity s ESD protection: x HBM EIA/JESD22-A114-B exceeds 2000 V x MM EIA/JESD22-A115-A exceeds 200 V x CDM EIA/JESD22-C101 exceeds 1000 V. s Low power dissipation s Balanced propagation delays s Multiple package options s Specied from 40 °C to +80 °C and from 40 °C to +125 °C.
3. Quick reference data
Table 1: Quick reference data GND = 0 V; Tamb = 25 °C; tr = tf ≤ 3.0 ns. Symbol tPHL, tPLH CI CPD Parameter propagation delay A and B to Y input capacitance power dissipation capacitance CL = 50 pF; fi = 1 MHz
[1] [2]
Conditions CL = 15 pF; VCC = 5 V
Min -
Typ 3.2 1.5 17
Max 5.9 10 -
Unit ns pF pF
Type 74AHC2G08
Philips Semiconductors
74AHC2G08; 74AHCT2G08
Dual 2-input AND gate
Table 1: Quick reference data …continued GND = 0 V; Tamb = 25 °C; tr = tf ≤ 3.0 ns. Symbol tPHL, tPLH CI CPD Parameter propagation delay A and B to Y input capacitance power dissipation capacitance CL = 50 pF; fi = 1 MHz
[1] [2]
Conditions CL = 15 pF; VCC = 5 V
Min -
Typ 3.6 1.5 19
Max 6.2 10 -
Unit ns pF pF
Type 74AHCT2G08
[1]
CPD is used to determine the dynamic power dissipation (PD in W). PD = CPD × VCC2 × fi × N + Σ(CL × VCC2 × fo) where: fi = input frequency in MHz; fo = output frequency in MHz……
