器件名称: 74AHC1G09GW
功能描述: 2-input AND gate with open-drain output
文件大小: 65.8KB 共11页
简 介:74AHC1G09
2-input AND gate with open-drain output
Rev. 01 — 26 September 2005 Product data sheet
1. General description
The 74AHC1G09 is a high-speed Si-gate CMOS device. The 74AHC1G09 provides the 2-input AND function with open-drain output. The output of the 74AHC1G09 is an open drain and can be connected to other open-drain outputs to implement active-LOW, wired-OR or active-HIGH wired-AND functions. For digital operation this device must have a pull-up resistor to establish a logic HIGH level.
2. Features
s High noise immunity s ESD protection: x HBM JESD22-A114-C exceeds 2000 V x MM JESD22-A115-A exceeds 200 V s Low power dissipation s Specied from 40 °C to +85 °C and from 40 °C to +125 °C.
3. Quick reference data
Table 1: Quick reference data GND = 0 V; Tamb = 25 °C; tr = tf ≤ 3.0 ns. Symbol tPZL, tPLZ Ci CPD
[1]
Parameter propagation delay A and B to Y input capacitance power dissipation capacitance
Conditions VCC = 4.5 V to 5.5 V; CL = 15 pF CL = 50 pF; fi = 1 MHz; VI = GND to VCC
[1]
Min -
Typ 3.2 1.5 5
Max 5.5 10 -
Unit ns pF pF
CPD is used to determine the dynamic power dissipation (PD in W). PD = CPD × VCC2 × fi × N + (CL × VCC2 × fo) where: fi = input frequency in MHz; fo = output frequency in MHz; CL = output load capacitance in pF; VCC = supply voltage in Volts; N = number of inputs switching; (CL × VCC2 × fo) = dissipation due to the output if the combination of the pull up voltage and resistance results in VCC at the output.
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