器件名称: 74AHC139D
功能描述: Dual 2-to-4 line decoder/demultiplexer
文件大小: 582.82KB 共16页
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DATA SHEET
74AHC139; 74AHCT139 Dual 2-to-4 line decoder/demultiplexer
Product specication File under Integrated Circuits, IC06 1999 Sep 01
Philips Semiconductors
Product specication
Dual 2-to-4 line decoder/demultiplexer
FEATURES ESD protection: HBM EIA/JESD22-A114-A exceeds 2000 V MM EIA/JESD22-A115-A exceeds 200 V CDM EIA/JESD22-C101 exceeds 1000 V Balanced propagation delays All inputs have Schmitt trigger actions Inputs accept voltages higher than VCC For AHC only: operates with CMOS input levels For AHCT only: operates with TTL input levels Specified from 40 to +85 °C and 40 to +125 °C. DESCRIPTION
74AHC139; 74AHCT139
The 74AHC/AHCT139 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. The 74AHC/AHCT139 are high-speed, dual 2-to-4 line decoder/demultiplexers. This device has two independent decoders, each accepting two binary weighted inputs (nA0 and nA1) and providing four mutually exclusive active LOW outputs (nY0 to nY3). Each decoder has an active LOW enable input (nE). When nE is HIGH, every output is forced HIGH. The enable input can be used as the data input for a 1-to-4 demultiplexer application. The ‘139’ is identical to the HEF4556 of the HE4000B family.
QUICK REFERENCE DATA Ground = 0 V; Tamb = 25 °C; tr = tf ≤ 3.0 ns. TYPICAL SYMBOL tPHL/tPLH PARAMETER propagation delay nAn to nYn nE to nYn CI CO CPD Notes 1. CPD is use……
