器件名称: 74AHC132
功能描述: Quad 2-input NAND Schmitt trigger
文件大小: 106.13KB 共16页
简 介:INTEGRATED CIRCUITS
DATA SHEET
74AHC132; 74AHCT132 Quad 2-input NAND Schmitt trigger
Product specication Supersedes data of 1999 May 31 File under Integrated Circuits, IC06 1999 Sep 24
Philips Semiconductors
Product specication
Quad 2-input NAND Schmitt trigger
FEATURES ESD protection: HBM EIA/JESD22-A114-A exceeds 2000 V; MM EIA/JESD22-A115-A exceeds 200 V CDM EIA/JESD22-C101 exceeds 1000 V Balanced propagation delays Inputs accepts voltages higher than VCC For AHC only: operates with CMOS input levels For AHCT only: operates with TTL input levels Specified from 40 to +85 and +125 °C. DESCRIPTION The 74AHC/AHCT132 are high-speed Si-gate CMOS devices and are pin compatible with Low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard No. 7A. The 74AHC/AHCT132 contain four 2-input NAND gates which accept standard input signals. They are capable of transforming slowly changing input signals into sharply defined, jitter free output signals. The gate switches at different points for positive and negative-going signals. The difference between the positive voltage VT+ and the negative VT is defined as the hysteresis voltage VH. ORDERING INFORMATION OUTSIDE NORTH AMERICA 74AHC132D 74AHC132PW 74AHCT132D 74AHCT132PW Note FUNCTION TABLE See note 1. INPUTS nA L L H H
74AHC132; 74AHCT132
OUTPUT nB L H L H nY H H H L
1. H = HIGH voltage level; L = LOW voltage level. QUICK REFERENCE DATA GND = 0 V; Tamb = 25 °C; tr = tf ≤ 3.0 ns. TYPICAL SYMBOL tP……
