器件名称: 74AHC00D
功能描述: Quad 2-input NAND gate
文件大小: 84.6KB 共13页
简 介:74AHC00; 74AHCT00
Quad 2-input NAND gate
Rev. 03 — 8 January 2008 Product data sheet
1. General description
The 74AHC00; 74AHCT00 is a high-speed Si-gate CMOS device and is pin compatible with Low-power Schottky TTL (LSTTL). They are specied in compliance with JEDEC standard JESD7-A. The 74AHC00; 74AHCT00 provides the quad 2-input NAND function.
2. Features
s s s s s s Balanced propagation delays All inputs have a Schmitt-trigger action Inputs accepts voltages higher than VCC For 74AHC00 only: operates with CMOS input levels For 74AHCT00 only: operates with TTL input levels ESD protection: x HBM JESD22-A114E exceeds 2000 V x MM JESD22-A115-A exceeds 200 V x CDM JESD22-C101C exceeds 1000 V s Multiple package options s Specied from 40 °C to +85 °C and from 40 °C to +125 °C
3. Ordering information
Table 1. Ordering information Package Temperature range 74AHC00D 74AHCT00D 74AHC00PW 74AHCT00PW 74AHC00BQ 74AHCT00BQ 40 °C to +125 °C 40 °C to +125 °C TSSOP14 40 °C to +125 °C Name SO14 Description plastic small outline package; 14 leads; body width 3.9 mm plastic thin shrink small outline package; 14 leads; body width 4.4 mm Version SOT108-1 SOT402-1 SOT762-1 Type number
DHVQFN14 plastic dual in-line compatible thermal enhanced very thin quad at package; no leads; 14 terminals; body 2.5 × 3 × 0.85 mm
NXP Semiconductors
74AHC00; 74AHCT00
Quad 2-input NAND gate
4. Functional diagram
1 1 1A 2 1B 4 2A 5 2B 9 3A 10 3B 12 4A 13 4B 1Y 3 2 4 2Y 6 5 9 10 12 13
mna212
&
3
&
6
3Y 8
……
