器件名称: IDT5V50015
功能描述: LOW EMI CLOCK GENERATOR
文件大小: 207.73KB 共9页
简 介:DATASHEET
LOW EMI CLOCK GENERATOR Description
The IDT5V50015 generates a low EMI output clock from a clock or crystal input. The part is designed to dither the LCD interface clock for PDAs, printers, scanners, modems, copiers, and others. Using IDT’s proprietary mix of analog and digital Phase-Locked Loop (PLL) technology, the device spreads the frequency spectrum of the output, reducing the frequency amplitude peaks by several dB. IDT offers many other clocks for computers and computer peripherals. Consult IDT when you need to remove crystals and oscillators from your board.
IDT5V50015 Features
Packaged in 8-pin SOIC/TSSOP Provides a spread spectrum output clock 135 MHz to 200 MHz operation Accepts a clock input (provides same frequency dithered output)
Center spread modulation Peak reduction by 8 dB to 16 dB typical on 3rd through
19th odd harmonics
Low EMI feature can be disabled Operating voltage of 3.3 V Advanced, low-power CMOS process
Block Diagram
VDD
S1:0 SSCC
2 PLL Clock Synthesis and Spread Spectrum Circuitry
SSCLK
ICLK
GND
IDT LOW EMI CLOCK GENERATOR
1
IDT5V50015
REV F 031109
IDT5V50015 LOW EMI CLOCK GENERATOR
SSCG
Pin Assignment
ICLK VDD GND SSCLK 1 2 3 4 8 7 6 5 VDD S0 S1 SSCC
Spread Direction and Percentage Select Table
S1 Pin 6 S0 Pin 7 Spread Direction Spread Percentage
0 0 1 1
0 1 0 1
Center Center Center Center
±0.5 ±1.0 ±1.5 ±2.0
8 pin (150 mil) SOIC/TSSOP
0 = connect to GND 1 = connect directly to VDD
Pin Descriptions
Pi……
