器件名称: HD74HC75RPEL
功能描述: Quad. Bistable Latches
文件大小: 103.31KB 共8页
简 介:HD74HC75
Quad. Bistable Latches
REJ03D0550-0200 (Previous ADE-205-422) Rev.2.00 Oct 06, 2005
Description
This latch is ideally suited for use as temporary storage for binary information processing, input/output, and indicator units. Information present at the data (D) input is transferred to the Q output when the latch enable (LE) is high. The Q output will follow the data input as long as the enable remains high. When the enable goes low, the information that was present at the data input at the time the transition occurred is retained at the Q output unit the enable is permitted to go high again.
Features
High Speed Operation: tpd (D to Q) = 12.5 ns typ (CL = 50 pF) High Output Current: Fanout of 10 LSTTL Loads Wide Operating Voltage: VCC = 2 to 6 V Low Input Current: 1 A max Low Quiescent Supply Current: ICC (static) = 2 A max (Ta = 25°C) Ordering Information
Part Name HD74HC75P HD74HC75FPEL HD74HC75RPEL Package Type DILP-16 pin SOP-16 pin (JEITA) SOP-16 pin (JEDEC) Package Code (Previous Code) PRDP0016AE-B (DP-16FV) PRSP0016DH-B (FP-16DAV) PRSP0016DG-A (FP-16DNV) Package Abbreviation P FP RP — EL (2,000 pcs/reel) EL (2,500 pcs/reel) Taping Abbreviation (Quantity)
Note: Please consult the sales office for the above package availability.
Function Table
Inputs Data L H X Latch Enable H H L Q L H Q0 Outputs Q H L Q0
H: High level L: Low level X: Irrelevant Q0, Q0 : Output level before the indicated steady state input conditions were established.
Rev.2.00, Oct 06, ……
