器件名称: 74AHC123ABQ
功能描述: Dual retriggerable monostable multivibrator with reset
文件大小: 122.59KB 共21页
简 介:74AHC123A; 74AHCT123A
Dual retriggerable monostable multivibrator with reset
Rev. 02 — 18 January 2008 Product data sheet
1. General description
The 74AHC123A; 74AHCT123A are high-speed Si-gate CMOS devices and are pin compatible with Low power Schottky TTL (LSTTL). They are specied in compliance with JEDEC standard no. 7A. The 74AHC123A; 74AHCT123A are dual retriggerable monostable multivibrators with output pulse width control by three methods. The basic pulse time is programmed by selection of an external resistor (REXT) and capacitor (CEXT). The external resistor and capacitor are normally connected as shown in Figure 11. Once triggered, the basic output pulse width may be extended by retriggering the gated active LOW-going edge input (nA) or the active HIGH-going edge input (nB). By repeating this process, the output pulse period (nQ = HIGH, nQ = LOW) can be made as long as desired. Alternatively an output delay can be terminated at any time by a LOW-going edge on input nRD, which also inhibits the triggering. An internal connection from nRD to the input gate makes it possible to trigger the circuit by a positive-going signal at input nRD as shown in Table 3. Figure 8 and Figure 9 illustrate pulse control by retriggering and early reset. The basic output pulse width is essentially determined by the value of the external timing components REXT and CEXT. When CEXT ≥ 10 nF, the typical output pulse width is dened as: tW = REXT × CEXT where tW = pulse width in ns; REXT = ex……
