器件名称: 74AHC02PW
功能描述: Quad 2-input NOR gate
文件大小: 84.42KB 共13页
简 介:74AHC02; 74AHCT02
Quad 2-input NOR gate
Rev. 03 — 7 January 2008 Product data sheet
1. General description
The 74AHC02; 74AHCT02 is a high-speed Si-gate CMOS device and is pin compatible with Low-power Schottky TTL (LSTTL). They are specied in compliance with JEDEC standard JESD7-A. The 74AHC02; 74AHCT02 provides the quad 2-input NOR function.
2. Features
s s s s s s Balanced propagation delays All inputs have a Schmitt-trigger action Inputs accepts voltages higher than VCC For 74AHC02 only: operates with CMOS input levels For 74AHCT02 only: operates with TTL input levels ESD protection: x HBM JESD22-A114E exceeds 2000 V x MM JESD22-A115-A exceeds 200 V x CDM JESD22-C101C exceeds 1000 V s Multiple package options s Specied from 40 °C to +85 °C and from 40 °C to +125 °C
3. Ordering information
Table 1. Ordering information Package Temperature range 74AHC02D 74AHCT02D 74AHC02PW 74AHCT02PW 74AHC02BQ 74AHCT02BQ 40 °C to +125 °C 40 °C to +125 °C TSSOP14 40 °C to +125 °C Name SO14 Description plastic small outline package; 14 leads; body width 3.9 mm plastic thin shrink small outline package; 14 leads; body width 4.4 mm Version SOT108-1 SOT402-1 SOT762-1 Type number
DHVQFN14 plastic dual in-line compatible thermal enhanced very thin quad at package; no leads; 14 terminals; body 2.5 × 3 × 0.85 mm
NXP Semiconductors
74AHC02; 74AHCT02
Quad 2-input NOR gate
4. Functional diagram
2 3 5 6 8 9 11 12
1A 1B 2A 2B 3A 3B 4A 4B
1Y
1 2 ≥1 1 A ≥1 4 B Y
mna215
2Y
4
3 5
3Y
10
6 8……
