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6P30006ANLGI

器件名称: 6P30006ANLGI
功能描述: CLOCK DISTRIBUTION CIRCUIT
文件大小: 241.59KB    共12页
生产厂商: IDT
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简  介:DATASHEET CLOCK DISTRIBUTION CIRCUIT Description The IDT6P30006A is a low-power, eight output clock distribution circuit. The device takes a TCXO or LVCMOS input and generates eight high-quality outputs. It includes a redundant input with automatic glitch-free switching when the primary reference is removed. The primary input may be selected by the user by pulling the SEL pin low or high. If the primary input is removed and brought back, it will not be re-selected until 1024 cycles have passed. The IDT6P30006A specifically addresses the needs of handheld applications in both performance and package size. The device is packaged in a small 4mm x 4mm 24-pin QFN, allowing optimal use for limited board space. IDT6P30006A Features Packaged in 24-pin QFN LVCMOS or TCXO sine wave input +1.8 V operating voltage Glitch-free input switching Eight buffered square wave outputs at 1.8 V LVCMOS levels Individual output enables controlled via I2C or OEx Pb free, RoHS compliant package Industrial temperature range (-40°C to +85°C) Block Diagram VDD 1.8 V 4 OE1 OUT1 SCLK SDATA OE2 OUT2 OE3 OUT3 OE4 OUT4 LVCMOS_INB OUT5 OUT6 TCXO_INA ±100mVpp MUX OUT7 OUT8 3 SEL GND IDT CLOCK DISTRIBUTION CIRCUIT 1 IDT6P30006A REV C 111009 IDT6P30006A CLOCK DISTRIBUTION CIRCUIT DISTRIBUTION CIRCUITS Pin Assignment TCXO_INA GND OUT1 OUT2 SEL Pin Configuration Table SEL VDD Primary Input LVCMOS_INB TCXO_INA VDD 0 1 OUT3 OUT4 GND VDD LVCMOS_INB OE4 OE1 SCLK SDATA SEL GND 1 19 OE Pin Co……
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