器件名称: ASM2I99448
功能描述: 3.3V/2.5V LVCMOS 1:12 Clock Fanout Buffer
文件大小: 594.89KB 共15页
简 介:May 2005 rev 0.3 3.3V/2.5V LVCMOS 1:12 Clock Fanout Buffer
Features
12 LVCMOS compatible clock outputs Selectable LVCMOS and differential LVPECL compatible clock inputs Maximum clock frequency of 350MHz Maximum clock skew of 150pS Synchronous output stop in logic low state eliminates output runt pulses High–impedance output control 3.3V or 2.5V power supply Drives up to 24 series terminated clock lines Ambient temperature range –40°C to +85°C 32–Lead LQFP & TQFP packaging Supports clock distribution in networking,
ASM2I99448
The ASM2I99448 is specifically designed to distribute LVCMOS compatible clock signals up to a frequency of 350MHz. Each output provides a precise copy of the input signal with a near zero skew. The outputs buffers support driving of 50 terminated transmission lines on the incident edge: each output is capable of driving either one parallel terminated or two series terminated transmission lines. Two selectable, independent clock inputs are available, providing support of LVCMOS and differential LVPECL clock distribution systems. The ASM2I99448 CLK_STOP control is synchronous to the falling edge of the input clock. It allows the start and stop of the output clock signal only in a logic low state, thus eliminating potential output runt pulses. Applying the OE control will force the outputs into high–impedance mode. All inputs have an internal pull–up or pull–down resistor preventing unused and open inputs from floating. The device supports a 2.5……
