器件名称: W3EG72126S202AJD3
功能描述: 1GB-128Mx72 DDR SDRAM REGISTERED ECC w/PLL
文件大小: 338.66KB 共15页
简 介:White Electronic Designs
W3EG72126S-D3 -JD3 -AJD3
PRELIMINARY*
1GB-128Mx72 DDR SDRAM REGISTERED ECC w/PLL
FEATURES
Double-data-rate architecture DDR200, DDR266 and DDR333: JEDEC design specications Bi-directional data strobes (DQS) Differential clock inputs (CK & CK#) Programmable Read Latency 2,2.5 (clock) Programmable Burst Length (2,4,8) Programmable Burst type (sequential & interleave) Edge aligned data output, center aligned data input. Auto and self refresh Serial presence detect Power supply: VCC = 2.5V ± 0.20V JEDEC standard 184 pin DIMM package Package height options: JD3: 30.48mm (1.20") and AJD3: 28.70mm (1.13") Consult factory for availability of lead-free products.
* This product is under development, is not qualied or characterized and is subject to change without notice.
DESCRIPTION
The W3EG72126S is a 128Mx72 Double Data Rate SDRAM memory module based on 512Mb DDR SDRAM components. The module consists of eighteen 128Mx4 DDR SDRAMs in 66 pin TSOP packages mounted on a 184 pin FR4 substrate. Synchronous design allows precise cycle control with the use of system clock. Data I/O transactions are possible on both edges and Burst Lengths allow the same device to be useful for a variety of high bandwidth, high performance memory system applications.
OPERATING FREQUENCIES
DDR333 @CL=2.5 Clock Speed CL-tRCD-tRP 166MHz 2.5-3-3 DDR266 @CL=2 133MHz 2-2-2 DDR266 @CL=2 133MHz 2-3-3 DDR266 @CL=2.5 133MHz 2.5-3-3 DDR200 @CL=2 100MHz 2-2-2
November 2004 Rev. 3
1
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