器件名称: W5610
功能描述: 32-BIT RISC MICROCONTROLLER
文件大小: 99.29KB 共4页
简 介:RDC
W5610
RISC DSP Communication
32-BIT RISC MICROCONTROLLER
W5610 Brief Sheet
32 BIT RISC MICRO PROCESSOR
Specifications are subject to change without notice, contact your sales representatives for the most update information. Page 1 of 4 REV 1.0 Jul.02 2007
RDC
1 Features
l CPU Core
– – – –
W5610
RISC DSP Communication
32-BIT RISC MICROCONTROLLER
460.8K baud (max. to 1Mbps) – The character options are programmable for 1 start bit; 1, 1.5 or 2 stop bits; even, odd or no parity, 5~8 data bits
RDC’s proprietary 32 bit RISC architecture 6 stage pipeline architecture Operation frequency: 166 MHz Supports a 16K-byte cache
l RDC Debug Tool Support
– RDC debug tool with a JTAG-like interface
l Parallel Flash ROM
– – Supports 16-bit data bus width Parallel Flash ROM control interface up to 2M*16bits
l General Programmable I/O
– – 29 PINs programmable I/O ports Pins individually configurable to input or output mode
l SDRAM Controller
– – Supports 16-bit data bus width SDRAM control interface up to 64MB – – – –
l Two 10/100M Fast Ethernet MAC Ports
IEEE 802.3u MII interface IEEE 802.3x flow control in full-duplex mode Internal loop-back self-test circuit support Descriptor architecture for packet TX/RX
l DMA Controller
– – Provides two 8237 DMA compatible controllers which are cascaded internally 4 channels for 8-bit DMA transfer and 3 channels for 16-bit transfer
l Wireless 802.11 a/b/g MAC+BBP
– – – 802.11 a/b/g standard compliant 802.11 d/h/i/j standard compliant D……
