EEPW首页 | 器件索引 | 厂商列表 | IC替换 | 微缩略语 | 电路图查询
器件查询:
400万器件资料库等您来搜!
   首页 > WEDC > W3EG2256M72ASSR202JD3XG

W3EG2256M72ASSR202JD3XG

器件名称: W3EG2256M72ASSR202JD3XG
功能描述: 4GB - 2x256Mx72 DDR SDRAM REGISTERED ECC, w/PLL
文件大小: 217.15KB    共14页
生产厂商: WEDC
下  载:    在线浏览   点击下载
简  介:White Electronic Designs W3EG2256M72ASSR-JD3 -AJD3 PRELIMINARY* 4GB – 2x256Mx72 DDR SDRAM REGISTERED ECC, w/PLL FEATURES Double-data-rate architecture DDR200, and DDR266: JEDEC design specications Bi-directional data strobes (DQS) Differential clock inputs (CK & CK#) Programmable Read Latency 2,2.5 (clock) Programmable Burst Length (2,4,8) Programmable Burst type (sequential & interleave) Edge aligned data output, center aligned data input. Auto and self refresh Serial presence detect Dual Rank Power supply: VCC = 2.5V ± 0.2V JEDEC standard 184 pin DIMM package Package height options: JD3: 30.48mm (1.2"), AJD3: 28.70mm (1.13") NOTE: Consult factory for availability of: RoHS compliant products Vendor source control options Industrial temperature option * This product is under development, is not qualied or characterized and is subject to change without notice. DESCRIPTION The W3EG2256M72ASSR is a 2x256Mx72 Double Data Rate SDRAM memory module based on 1Gb DDR SDRAM components. The module consists of eighteen 512Mx4 stacks, in 66 pin TSOP packages mounted on a 184 pin FR4 substrate. Synchronous design allows precise cycle control with the use of system clock. Data I/O transactions are possible on both edges and Burst Lengths allow the same device to be useful for a variety of high bandwidth, high performance memory system applications. OPERATING FREQUENCIES DDR266 @CL=2 Clock Speed CL-tRCD-tRP 133MHz 2-2-2 DDR266 @CL=2 133MHz 2-3-3 DDR266 @CL=2.5 133MHz 2.5-3-3 DDR200 ……
相关电子器件
器件名 功能描述 生产厂商
W3EG2256M72ASSR202JD3XG 4GB - 2x256Mx72 DDR SDRAM REGISTERED ECC, w/PLL WEDC
《电子产品世界》杂志社 版权所有 北京东晓国际技术信息咨询有限公司
Copyright ©2002 ELECTRONIC ENGINEERING & PRODUCT WORLD. All rights reserved.
京ICP备12027778号-2