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W3EG2128M72AFSR265D3XG

器件名称: W3EG2128M72AFSR265D3XG
功能描述: 2GB - 2x128Mx72 DDR SDRAM REGISTERED ECC, w/PLL, FBGA
文件大小: 272.76KB    共13页
生产厂商: WEDC
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简  介:White Electronic Designs W3EG2128M72AFSR-D3 -AD3 FINAL* 2GB – 2x128Mx72 DDR SDRAM REGISTERED ECC, w/PLL, FBGA FEATURES Double-data-rate architecture DDR266, DDR333, and DDR400 Bi-directional data strobes (DQS) Phase-lock loop (PLL) clock driver to reduce loading Differential clock inputs (CK & CK#) ECC error detection and correction Programmable Read Latency 2, 2.5 (clock) Programmable Burst Length (2, 4,8) Programmable Burst type (sequential & interleave) Edge aligned data output, center aligned data input. Auto and self refresh Serial presence detect Dual Rank RoHS compliant products Power Supply: VCC = VCCQ = +2.5V ± 0.2 (133 and 166MHz) VCC = VCCQ = +2.6V ± 0.1 (200MHz) JEDEC standard 184 pin DIMM package Package height options: Low-prole: 30.48mm (1.20") MAX NOTE: Consult factory for availability of: Vendor source control options Industrial temperature option * This product is subject to change without notice. DESCRIPTION The W3EG2128M72AFSR is a 2x128Mx72 Double Data Rate SDRAM memory module based on 512Mb DDR SDRAM components. The module consists of thirtysix 128Mx4 components, in FBGA packages mounted on a 184 pin FR4 substrate. Synchronous design allows precise cycle control with the use of system clock. Data I/O transactions are possible on both edges and Burst Lengths allow the same device to be useful for a variety of high bandwidth, high performance memory system applications. OPERATING FREQUENCIES DDR400@CL=3 Clock Speed CL-tRCD-tRP 200MHz 3-3-3 DDR333@……
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器件名 功能描述 生产厂商
W3EG2128M72AFSR265D3XG 2GB - 2x128Mx72 DDR SDRAM REGISTERED ECC, w/PLL, FBGA WEDC
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