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W3EG128M72ETSU265AJD3

器件名称: W3EG128M72ETSU265AJD3
功能描述: 1GB - 128Mx72 DDR SDRAM UNBUFFERED ECC w/PLL
文件大小: 265.14KB    共14页
生产厂商: WEDC
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简  介:White Electronic Designs W3EG128M72ETSU-D3 -JD3 -AJD3 ADVANCED* 1GB – 128Mx72 DDR SDRAM UNBUFFERED ECC w/PLL FEATURES Double-data-rate architecture DDR200, DDR266, DDR333 and DDR400 JEDEC design specication Bi-directional data strobes (DQS) Differential clock inputs (CK & CK#) Programmable Read Latency 2,2.5 (clock) Programmable Burst Length (2,4,8) Programmable Burst type (sequential & interleave) Edge aligned data output, center aligned data input Auto and self refresh Serial presence detect Power supply: VCC = VCCQ = +2.5V ± 0.2V (100, 133 and 166MHz) VCC = VCCQ = +2.6V ± 0.1V (200MHz) JEDEC standard 184 pin DIMM package Package height options: JD3: 30.48 mm (1.20”) AJD3: 28.70 mm (1.13”) NOTE: Consult factory for availability of: Lead-free products Vendor source control option Industrial temperature option * This product is under development, is not qualied or characterized and is subject to change or cancellation without notice. DESCRIPTION The W3EG128M72ETSU is a 128Mx72 Double Data Rate SDRAM memory module based on 1Gb DDR SDRAM components. The module consists of nine 128Mx8 DDR SDRAMs in 66 pin TSOP packages mounted on a 184 pin FR4 substrate. Synchronous design allows precise cycle control with the use of system clock. Data I/O transactions are possible on both edges and Burst Lengths allow the same device to be useful for a variety of high bandwidth, high performance memory system applications. OPERATING FREQUENCIES DDR400@CL=3 Clock Speed CL-tRCD-tRP 200……
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器件名 功能描述 生产厂商
W3EG128M72ETSU265AJD3 1GB - 128Mx72 DDR SDRAM UNBUFFERED ECC w/PLL WEDC
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