器件名称: W3DG72128V-D1
功能描述: 1GB - 128Mx72 SDRAM, UNBUFFERED w/PLL
文件大小: 86.49KB 共6页
简 介:White Electronic Designs
1GB - 128Mx72 SDRAM, UNBUFFERED w/PLL
FEATURES
PC100 and PC133 compatible Burst Mode Operation Auto and Self Refresh capability LVTTL compatible inputs and outputs Serial Presence Detect with EEPROM Fully synchronous: All signals are registered on the positive edge of the system clock Programmable Burst Lengths: 1, 2, 4, 8 or Full Page 3.3V ± 0.3V Power Supply 144 Pin SO-DIMM JEDEC
W3DG72128V-D1
PRELIMINARY*
DESCRIPTION
The W3DG72128V is a 128Mx72 synchronous DRAM module which consists of nine 128Mx8 stacks of SDRAM components in TSOP II package, and one 2Kb EEPROM in an 8 pin TSSOP package for Serial Presence Detect which are mounted on a 144 pin SO-DIMM multilayer FR4 Substrate. This module is structured as 2 Ranks of 64Mx72 SDRAM.
* This product is under development, is not qualied or characterized and is subject to change without notice..
PIN CONFIGURATIONS (FRONT SIDE/BACK SIDE)
PIN NAMES
A0 – A12 Address Input (Multiplexed) Select Bank Data Input/Output Clock Input Check Bit (Data-In/Data-Out) Clock Enable Input ChipSelect Input Row Address Strobe Column Address Strobe Write Enable DQM Power Supply (3.3V) Ground Serial Data I/O Serial Clock Do Not Use No Connect
PINOUT
PIN 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 FRONT VSS DQ DQ1 DQ2 DQ3 VCC DQ4 DQ5 DQ6 DQ7 VSS DQMB0 DQMB1 VCC A0 A1 A2 VSS DQ8 DQ9 DQ10 DQ11 VCC DQ12 PIN 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 BACK VSS DQ32 DQ33 DQ34 DQ3……
