EEPW首页 | 器件索引 | 厂商列表 | IC替换 | 微缩略语 | 电路图查询
器件查询:
400万器件资料库等您来搜!
   首页 > WEDC > W364M72V-100SB

W364M72V-100SB

器件名称: W364M72V-100SB
功能描述: 64Mx72 Synchronous DRAM
文件大小: 495.39KB    共16页
生产厂商: WEDC
下  载:    在线浏览   点击下载
简  介:White Electronic Designs 64Mx72 Synchronous DRAM FEATURES High Frequency = 100, 125MHz Package: 219 Plastic Ball Grid Array (PBGA), 32 x 25mm 3.3V ±0.3V power supply for core and I/Os Fully Synchronous; all signals registered on positive edge of system clock cycle Internal pipelined operation; column address can be changed every clock cycle Internal banks for hiding row access/precharge Programmable Burst length 1,2,4,8 or full page 8,192 refresh cycles Commercial, Industrial and Military Temperature Ranges Organized as 64M x 72 Weight: W364M72V-XSBX - TBD grams typical W364M72V-XSBX ADVANCED* BENEFITS 66% SPACE SAVINGS Reduced part count from 9 to 1 Reduced I/O count 55% I/O Reduction Reduced trace lengths for lower parasitic capacitance Suitable for hi-reliability applications Laminate interposer for optimum TCE match GENERAL DESCRIPTION The 512MByte (4.5Gb) SDRAM is a high-speed CMOS, dynamic random-access, memory using 9 chips containing 512M bits. Each chip is internally congured as a quadbank DRAM with a synchronous interface. Each of the chip’s 134,217,728-bit banks is organized as 8,192 rows by 2,048 columns by 8 bits. Read and write accesses to the SDRAM are burst oriented; accesses start at a selected location and continue for a * This product is under development, is not qualied or characterized and is subject to change or cancellation without notice. ACTUAL SIZE White Electronic Designs W364M72V-XSBX 25 32 Area = 800mm2 I/O Count = 219 Balls SAVINGS –……
相关电子器件
器件名 功能描述 生产厂商
W364M72V-100SBM 64Mx72 Synchronous DRAM WEDC
W364M72V-100SBI 64Mx72 Synchronous DRAM WEDC
W364M72V-100SBC 64Mx72 Synchronous DRAM WEDC
W364M72V-100SB 64Mx72 Synchronous DRAM WEDC
《电子产品世界》杂志社 版权所有 北京东晓国际技术信息咨询有限公司
Copyright ©2002 ELECTRONIC ENGINEERING & PRODUCT WORLD. All rights reserved.
京ICP备12027778号-2