器件名称: W26L010AT-12
功能描述: 64K X 16 High Speed CMOS Static RAM
文件大小: 131.81KB 共10页
简 介:W26L010A 64K × 16 HIGH-SPEED CMOS STATIC RAM
GENERAL DESCRIPTION
The W26L010A is a high-speed, low-power CMOS static RAM organized as 65,536 × 16 bits that operates on a single 3.3-volt power supply. This device is manufactured using Winbond's high performance CMOS technology. The W26L010A has an active low chip select, separate upper and lower byte selects, and a fast output enable. No clock or refreshing is required. Separate byte select controls ( LB and UB ) allow individual bytes to be written and read. LB controls I/O1-I/O8, the lower byte. UB controls I/O9 I/O16, the upper byte. This device is well suited for use in high-density, high-speed system applications.
FEATURES
High speed access time: 10/12 nS (max.) Low power consumption: Single +3.3V power supply Fully static operation
Active: 530 mW (max.)
All inputs and outputs directly TTL compatible Three-state outputs Data byte control Available packages: 44-pin 400 mil SOJ and
LB (I/O1I/O8), UB (I/O9I/O16)
No clock or refreshing
44-pin TSOP(II)
PIN CONFIGURATION
BLOCK DIAGRAM
V DD VSS A0 . . DECODER
A0 A1 A2 A3 A4 CS I/O1 I/O2 I/O3 I/O4 VDD VSS I/O5 I/O6 I/O7 I/O8 WE A5 A6 A7 A8 NC
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 44-PIN
44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23
A15 A14 A13 OE UB LB I/O16 I/O15 I/O14 I/O13 VSS VDD I/O12 I/O11 I/O10 I/O9 NC A12 A11 A10 A9 NC
A15
CORE ARRAY
UB CS OE WE LB
CONTROL DATA I/O I/O1 . . I/O16
PIN DESCRIPTION
SYMBOL A0A1……
