器件名称: W184-5
功能描述: Six Output Peak Reducing EMI Solution
文件大小: 128.76KB 共8页
简 介:W184
Six Output Peak Reducing EMI Solution
Features
Cypress PREMIS family offering Generates an EMI optimized clocking signal at the output Selectable input to output frequency Six 1.25%, 3.75%, or 0% down or center spread outputs One non-Spread reference output Integrated loop filter components Operates with a 3.3 or 5V supply Low power CMOS design Available in 24-pin SSOP (Shrunk Small Outline Package) Outputs may be selectively disabled Table 1. Modulation Width Selection SS% 0 1 W184 Output Fin ≥ Fout ≥ Fin – 1.25% Fin ≥ Fout ≥ Fin – 3.75% W184-5 Output Fin + 0.625% ≥ Fin≥ – 0.625% Fin + 1.875% ≥ Fin≥ –1.875%
Table 2. Frequency Range Selection FS2 0 0 1 FS1 0 1 0 1 Frequency Range 8 MHz ≤ FIN ≤ 10 MHz 10 MHz ≤ FIN ≤ 15 MHz 15 MHz ≤ FIN ≤ 18 MHz 18 MHz ≤ FIN ≤ 28 MHz
Key Specifications
Supply Voltages: ........................................... VDD = 3.3V±5% or VDD = 5V±10% Frequency Range: .............................. 8 MHz ≤ Fin ≤ 28 MHz Crystal Reference Range.................... 8 MHz ≤ Fin ≤ 28 MHz Cycle to Cycle Jitter: ........................................ 300 ps (max.) Selectable Spread Percentage: ....................1.25% or 3.75% Output Duty Cycle: ............................... 40/60% (worst case) Output Rise and Fall Time: .................................. 5 ns (max.)
1
Table 3. Output Enable EN1 0 0 1 1 EN2 0 1 0 1 Low Low Active Active CLK0:4 Low Active Low Active CLK5
Simplified Block Diagram
3.3 or 5.0V
Pin Configuration
SSOP
X1 X……
