器件名称: ST20-GP6
功能描述: GPS PROCESSOR
文件大小: 1061.19KB 共123页
简 介:
ST20-GP6
GPS PROCESSOR
FEATURES
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Figure 1. Package
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Application specific features 12 channel GPS correlation DSP hardware, ST20 CPU (for control and position calculations) and memory on one chip no TCXO required RTCA-SC159 / WAAS / EGNOS supported GPS performance accuracy - stand alone with SA on <100m, SA off <30m - differential <1m - surveying <1cm time to first fix - autonomous start 90s - cold start 45s - warm start 7s - obscuration 1s Enhanced 32-bit VL-RISC CPU - C2 core 16/33/50 MHz processor clock 25 MIPS at 33 MHz fast integer/bit operations 64 Kbytes on-chip SRAM 128 Kbytes on-chip ROM Programmable memory interface 4 separately configurable regions 8/16-bits wide support for mixed memory 2 cycle external access Programmable UART (ASC) Parallel I/O Vectored interrupt subsystem Diagnostic control unit Power management low power operation power down modes Professional toolset support ANSI C compiler/link driver and libraries Debugging/profiling and simulation tools Technology Static clocked 50 MHz design 3.3 V, sub micron technology 100 pin PQFP package JTAG Test Access Port
PQFP100
Table 1. Order Codes
Part Number ST20GP6X33S Package PQFP100
Figure 2. Block Diagram
GPS radio ST20-GP6
12 channel GPS hardware DSP
ST20 CPU
Low power controller Real time clock/calendar
Interrupt controller
Serial communications 2 UART (ASC)
Programmable memory interface
Parallel input/output
. . . 16
64K SRAM
Diagnost……
