器件名称: 74ALVCH16245DTR
功能描述: Low-Voltage 16-Bit Transceiver with Bus Hold 1.8/2.5/3.3 V(3-State, Non-Inverting)
文件大小: 139.7KB 共12页
简 介:74ALVCH16245 Low-Voltage 16-Bit Transceiver with Bus Hold 1.8/2.5/3.3 V
(3–State, Non–Inverting)
http://onsemi.com
The 74ALVCH16245 is an advanced performance, non–inverting 16–bit transceiver. It is designed for very high–speed, very low–power operation in 1.8 V, 2.5 V or 3.3 V systems. The 74ALVCH16245 is designed with byte control. It can be operated as two separate octals, or with the controls tied together, as a 16–bit wide function. The Transmit/Receive (T/Rn) inputs determine the direction of data flow through the bi–directional transceiver. Transmit (active–HIGH) enables data from A ports to B ports; Receive (active–LOW) enables data from B to A ports. The Output Enable inputs (OEn), when HIGH, disable both A and B ports by placing them in a HIGH Z condition. The data inputs include active bushold circuitry, eliminating the need for external pull–up resistors to hold unused or floating inputs at a valid logic state.
MARKING DIAGRAM
48
48
74ALVCH16245DT
1
AWLYYWW
TSSOP–48 DT SUFFIX CASE 1201 A WL YY WW
1 = Assembly Location = Wafer Lot = Year = Work Week
Designed for Low Voltage Operation: VCC = 1.65 – 3.6 V 3.6 V Tolerant Inputs and Outputs High Speed Operation: 3.0 ns max for 3.0 to 3.6 V
3.7 ns max for 2.3 to 2.7 V 6.0 ns max for 1.65 to 1.95 V Static Drive: ±24 mA Drive at 3.0 V ±12 mA Drive at 2.3 V ±4 mA Drive at 1.65 V Supports Live Insertion and Withdrawal Includes Active Bushold to Hold Unused or Floating Inputs at a Valid Logic State IOFF Sp……
