器件名称: 54ACT138D
功能描述: 1-of-8 Decoder/Demultiplexer
文件大小: 183.37KB 共10页
简 介:54AC138 54ACT138 1-of-8 Decoder/Demultiplexer
August 1998
54AC138 54ACT138 1-of-8 Decoder/Demultiplexer
General Description
The ’AC/’ACT138 is a high-speed 1-of-8 decoder/ demultiplexer. This device is ideally suited for high-speed bipolar memory chip select address decoding. The multiple input enables allow parallel expansion to a 1-of-24 decoder using just three ’AC/’ACT138 devices or a 1-of-32 decoder using four ’AC/’ACT138 devices and one inverter.
Features
n n n n n n n ICC reduced by 50% Demultiplexing capability Multiple input enable for easy expansion Active LOW mutually exclusive outputs Outputs source/sink 24 mA ’ACT138 has TTL-compatible inputs Standard Microcircuit Drawing (SMD) — ’AC138: 5962-87622 — ’ACT138: 5962-87554
Logic Symbols
Connection Diagrams
Pin Assignment for DIP and Flatpak
DS100268-1
IEEE/IEC
DS100268-2
Pin Assignment for LCC
DS100268-7
Pin Names A0–A2 E1–E2 E3 O0–O7
Description Address Inputs Enable Inputs Enable Input Outputs
DS100268-3
FACT is a registered trademark of Fairchild Semiconductor Corporation.
1998 National Semiconductor Corporation
DS100268
www.national.com
Functional Description
The ’AC/’ACT138 high-speed 1-of-8 decoder/demultiplexer accepts three binary weighted inputs (A0, A1, A2) and, when enabled, provides eight mutually exclusive active-LOW outputs (O0–O7). The ’AC/’ACT138 features three Enable inputs, two active-LOW (E1, E2) and one active-HIGH (E3). All outputs will be HIGH unless E1 and E2 are LOW and ……
