器件名称: TP2104ND
功能描述: P-Channel Enhancement-Mode Vertical DMOS FETs
文件大小: 455.81KB 共4页
简 介:TP2104 Low Threshold P-Channel Enhancement-Mode Vertical DMOS FETs
Ordering Information
BVDSS / BVDGS -40V RDS(ON) (max) 6.0 VGS(th) (max) -2.0V Order Number/Package TO-236AB* TP2104K1 TO-92 TP2104N3 Die TP2104ND Product marking for SOT-23: P1L where = 2-week alpha date code
*Same as SOT-23. All units shipped on 3,000 piece carrier tape reels.
Features
Free from secondary breakdown Low power drive requirement Ease of paralleling Low CISS and fast switching speeds Excellent thermal stability Integral Source-Drain diode High input impedance and high gain Complementary N- and P-channel devices
Advanced DMOS Technology
These enhancement-mode (normally-off) transistors utilize a vertical DMOS structure and Supertex’s well-proven silicon-gate manufacturing process. This combination produces devices with the power handling capabilities of bipolar transistors and with the high input impedance and positive temperature coefficient inherent in MOS devices. Characteristic of all MOS structures, these devices are free from thermal runaway and thermally-induced secondary breakdown. Supertex’s vertical DMOS FETs are ideally suited to a wide range of switching and amplifying applications where high breakdown voltage, high input impedance, low input capacitance, and fast switching speeds are desired.
Applications
Logic level interfaces – ideal for TTL and CMOS Solid state relays Battery operated systems Photo voltaic drives Analog switches General purpose line drivers Tele……